// $Id$

module Memory(
	input wire i_clk,
	input wire i_reset,
	input wire i_ramwrite,
	input wire [0:15] i_addr,
	output wire [0:7] o_data,
	input wire [0:7] i_data
);
	reg [0:7] mem[0:65535];
	integer i;
	assign o_data = mem[i_addr];
	always @(posedge i_clk) begin
		if(i_ramwrite) mem[i_addr] <= i_data;
	end
	initial begin
		for(i = 0; i < 65536; i = i + 1) mem[i] = 0;
		$readmemb("rom.bin", mem);
	end
endmodule